Section 02
Generations
One rate ladder from 2.5 GT/s to 64 GT/s, the two encodings that sit under it, and the difference between a transfer rate and a usable byte rate.
One ladder, doubled at every rung
Each numbered generation of PCI Express roughly doubles the raw per lane transfer rate of the one before it. The ladder runs 2.5, 5.0, 8.0, 16.0, 32.0, 64.0 and 128.0 gigatransfers per second per lane, and every one of those rates is named in the rate tables of the PIPE specification revision 7.1 read for this site. What changes between rungs is not only the number: keeping a doubled rate intact across a real board required changes to encoding, to equalization and, at the top of the ladder, to the signaling itself.
Why is 8 GT/s worth more than 1.6 times 5 GT/s?
Because the encoding changed. The first two generations wrap eight bits of payload in ten bits on the wire, which spends a fifth of the line rate on the encoding. From the third generation the wrapper becomes 128 bits of payload in 130 bits on the wire, and the same table of contents that names the rates ties that scheme to 8, 16 and 32 GT/s. The line overhead falls from about a fifth to a little over one percent, so the usable byte rate very nearly doubles even though the transfer rate rose by a factor of 1.6. That arithmetic, and the difference between a transfer rate and a byte rate, is worked through in encoding and usable bandwidth.
What changed at the top of the ladder
The pattern of pushing two level signaling faster does not continue indefinitely. The sixth generation moves to four level pulse amplitude modulation with forward error correction, and introduces a fixed size flow control unit in place of the older variable length framing. The seventh doubles again from there. The consequence for a reader is practical: a board budget written for a two level link does not transfer to a four level one, and a figure quoted without its generation is not a figure at all.
Which number belongs on a page?
This site publishes the per lane transfer rate as the headline number because it is the one that appears in the specification and in the tables of a physical interface document. Usable byte rates are derived, and derived values are printed next to their derivation rather than presented as published figures. The full set, generation by generation, with the source of each row, is the link speed table, and the story of what changed at each step is the rate ladder.
What is still open
Publication dates are the weak part of this section. For several generations the desk could confirm only the year, and it says so on the page rather than printing a precise date it cannot support. The reading that would close the gap is named in sources and method.
The other doors of the publication: Link Basics, Form Factors, Compliance, Topology, Ecosystem and Bench Notes. Every one of them points back to the link speed table.
In this section
3 pages, newest first.
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The Rate Ladder, Generation by Generation
Each generation of the base specification doubles the per lane transfer rate. The interesting part is what had to change underneath to make that doubling survive a real board.
September 6, 2026
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Encoding, Overhead and Usable Bandwidth
A transfer rate counts symbols on the wire. A byte rate counts what reaches the other side. The gap between the two is the encoding, and it changed once.
September 6, 2026
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The Link Speed Table
One table, one row per generation, and a column that says where the figure came from. Everything else on this site refers back to it.
September 6, 2026