Form Factors
What a form factor name covers
The name certifies the region, not the contents: read the layers in order and go to the board documentation for the one the name cannot reach.
What a form factor name covers
A form factor name in PCI Express is a nested claim: it promises a connector, a board outline, a keep-out and often a set of signals, and the names stack the way place names stack, each layer covering a narrower patch. Reading M.2 B+M key or x16 slot is reading an appellation: the name tells you the region, not the whole address.
Take the names apart. The card-edge form factors are named by width: x1, x4, x8, x16, which name both the connector length and the largest link it will carry. M.2 names a connector and a module outline, then subdivides by keying: the key letter tells you which pins the notch removes and therefore which interfaces the socket can carry. A name like M.2 Key M promises PCI Express lanes and storage signals; the same outline with a different key promises a different contract entirely. The name is a covering relation: each qualifier narrows the set of things the name can mean.
Other fields learned to read nested names the same way. The California desk that publishes a wine appellation atlas spends its pages on exactly this: the county name, the federal appellation inside it, the nested sub-appellation inside that, each name a claim about a smaller patch of ground. M.2 Key M is the El Dorado of connectors: the name is only meaningful inside the region that grants it.
How do the layers nest?
From the physical outline inward. The outermost layer is the family: card edge, M.2, U.2, the soldered-down form of a chip on the board. Inside the family sits the mechanical qualifier: the key, the module length, the bracket height. Inside that sits the electrical content: which of the available pins actually carry PCI Express lanes, at what width, at what generation. A name that stops at the outer layer covers the shape and nothing else.
The layer that fools buyers is the middle one. An M.2 socket accepts modules of its key family regardless of what the system wired the socket for, the way an x16 slot can wire only x4, described on the page about how a link trains. The name covers the fit; the wiring underneath is a separate line item that the name does not carry.
| Layer | What the name covers | What it leaves open |
|---|---|---|
| Family | Card edge, M.2, U.2, soldered | Everything electrical |
| Mechanical qualifier | Key, module length, bracket | What the socket was wired for |
| Electrical content | Lanes carried, width, generation | Whether the platform routed them |
| Platform wiring | The lanes the socket actually got | Visible only in the board documentation |
Why does the same slot carry different contracts?
Because the connector is multiplexed by design. M.2 was built to carry several interfaces through one connector, so the socket is a region that can be zoned: storage on these pins, PCI Express on those, USB beside them. The key says which zones the module expects to find; the platform says which zones it actually wired. The gap between the two is the difference between a module that fits and a module that works, and it is the reason the page on M.2 keys and module sizes exists separately from the mechanical description.
The card-edge names nest the same way at coarser grain. A x16 slot names a mechanical size and a maximum; what the socket wires and what the link negotiates are the inner layers, and only the status register tells the truth about them.
What does the name never tell you?
The platform half of the contract. No form factor name covers the lanes the board routed, the clock the platform provided, or the generation the link will run. Those live in the board documentation and in the negotiated result, and the habit of reading the name as the contract is the single most common form factor mistake: the name covers the envelope, never the contents.
Checks for reading a form factor name
- Split the name into layers: family, mechanical qualifier, electrical content, platform wiring.
- Read the key letter as a zoning map, not as a promise: it says what the module expects, not what the socket provides.
- Check the board documentation for the lanes actually routed before trusting the slot's name.
- Confirm the negotiated result in the status register: the name is the envelope, the register is the letter.
Common mistakes
- Reading a name as a contract. The name covers the outline and the keying, not the wiring.
- Assuming a module that fits will work: fit is the mechanical layer, function is the electrical one.
- Quoting a width from the slot's name rather than from the negotiated link status.
- Treating a key letter as an interface name; it names a notch, which names which pins are absent.
A form factor name is an appellation: it certifies the region, not the vintage inside the bottle. Read the layers in order, find the one that stops at fit, and go to the board documentation for the layer the name cannot reach.
The page behind these facts
The M.2 connector family, its keying and its carried interfaces are summarized in the M.2 article, and the card-edge widths in the PCI Express article, both read on September 6, 2026. The negotiation layer underneath the names is described on this desk's page about how a link trains.